1. Field of the Invention
The present invention relates to a single-crystal 4H-SiC substrate and method for manufacturing the same having a reduced crystal defect density.
2. Background Art
Recently, much attention has been given to the use of silicon carbide (or SiC) as a material primarily for power control devices, since SiC is superior to silicon in terms of breakdown field strength, saturated drift velocity, and thermal conductivity. Power devices formed of SiC can be configured to have substantially reduced power loss and a reduced size, allowing power saving in power conversion. Therefore, these power devices can be used to enhance the performance of electric vehicles and the functionality of solar cell systems, etc., and hence are a key element in creating a low-carbon society.
The doping density and the thickness of a substrate on which an SiC power device is to be formed are determined substantially by the specifications of the device and therefore are typically required to be controlled more accurately than the doping density and the thickness of a bulk single-crystal substrate. In order to meet this requirement, an active region for the semiconductor device is epitaxially grown on a 4H-SiC bulk single-crystal substrate beforehand by thermal chemical vapor deposition (thermal CVD), etc. It should be noted that the term “active region,” as used herein, refers to a region having an accurately controlled thickness and an accurately controlled doping density in its crystal structure.
4H-SiC bulk single-crystal substrates inherently contain screw dislocations, which propagate in the c-axis direction, edge dislocations, and basal plane dislocations, which propagate perpendicular to the c-axis. These dislocations propagate into the epitaxial film grown on the substrate. Furthermore, new dislocation loops and stacking faults are introduced into the substrate during the epitaxial growth process. These crystal defects may degrade the breakdown voltage characteristics, reliability, and yield of the device formed using the SiC substrate and thereby prevent the practical use of the device.
It should be noted that methods of manufacturing a single-crystal 3C-SiC substrate have been proposed in which a single-crystal 3C-SiC layer is formed to have a flat surface interspersed with surface pits, which serves to reduce crystal defects (see, e.g., Japanese Laid-Open Patent Publication No. 2011-225421).